1. Field of the Invention
The present invention relates to an IC test device, particularly to a probe card structure for IC test.
2. Description of the Prior Art
In semiconductor fabrication, wafer sort is referred to a technology testing the integrated circuit (IC) on a wafer to guarantee that IC can operate normally and learn the yield of products. Normally, an automatic test equipment (ATE) is temporarily electrically connected with IC on a wafer to verify the performance of IC. A probe card is used to transmit signals between ATE and IC.
With continuous advancement of semiconductor technology, chips are persistently miniaturized to smaller and smaller size. Therefore, it is necessary to reduce the related dimensions of a probe card for wafer sort, such as the layout of the signal traces (for electric connection of the probe head) on the wafer side of the circuit board of a probe card. However, miniaturization of the signal trace layout would decrease the spacing between signal traces and may lead to leakage current therebetween. In such a case, the quality and result of wafer sort will be affected.